Journal of Applied Science and Engineering

Published by Tamkang University Press

1.30

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2.10

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K. I. Hwu This email address is being protected from spambots. You need JavaScript enabled to view it.1

1Institute of Electrical Engineering, National Taipei University of Technology, Taipei, Taiwan 106, R.O.C.


 

Received: December 26, 2007
Accepted: May 15, 2009
Publication Date: September 1, 2009

Download Citation: ||https://doi.org/10.6180/jase.2009.12.3.07  


ABSTRACT


Field programmable gate arrays (FPGA) based control of synchronous rectification (SR) is proposed herein and applied to a forward converter with an FPGA-based hysteresis voltage-controlled scheme along with maximum current limiting, without any analogue-to-digital converter (ADC) added. First, methods of approximately estimating the hysteresis band and the output voltage ripple are described. Secondly, an FPGA-based SR control algorithm is developed, and thus the energy fed back from the secondary side to the primary side of the main transformer can make transient load response improved. After this, the procedure for circuit design starts from the current slew rate of the output inductor and the output current slew rate from no to full load. Eventually, the differences in transient load response between with and without the proposed FPGA-based SR control technique are verified via some experimental results.


Keywords: FPGA, Forward Converter, Hysteresis, SR, Transient Load Response, Voltage-Controlled


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